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16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
INTRODUCTION
The S6A2068 is a dot matrix LCD driver & controller LSl which is fabricated by low power CMOS technology.
FUNCTION
-- -- -- -- -- -- -- -- -- -- Character type dot matrix LCD driver & controller Internal driver: 16 common and 60 segment signal output Display character format: 5 x 7 dots + cursor, 5 x 10 dots + cursor Easy interface with a 4-bit or 8-bit MPU Display character pattern: 5x7 dots format: 192 kinds, 5x10 dots format: 32 kinds The special character pattern is directly programmable by the Character Generator RAM. A customer character pattern programmable by mask option Automatic power on reset function It can drive a maximum of 80 characters by using the S6A0065 or S6A2067 externally. It is possible to read both Character Generator and Display Data RAM from MPU.
FEATURES
-- Internal Memory - Character Generator ROM: 8,320bits - Character Generator RAM: 512 bits - Display Data RAM: 80 x 8bits (80 characters max.) Power Supply Voltage; 2.7 to 5.5V Supply voltage for display: 0 to -5 V (V5) CMOS process 1/8 duty, 1/11 duty or 1/16 duty: programmable (1/8 duty; 5 x 7 dots format 1-line, 1/11 duly; 5 x 10 dots format 1-line, 1/16 duty: 5 x 7 dots format 2-line) 100 QFP or bare chip available
-- -- -- -- --
Precautions for Light Light has characteristics to move electrons in the integrated circuitry of semiconductors, therefore may change the characteristics of semiconductor devices when irradiated with light. Consequently, the users of the packages which may expose chips to external light such as COB, COG, TCP and COF must consider effective methods to block out light from reaching the IC on all parts of the surface area, the top, bottom and the sides of the chip. Follow the precautions below when using the products. 1. Consider and verify the protection of penetrating light to the IC at substrate (board or glass) or product design stage. Always test and inspect products under the environment with no penetration of light.
2.
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S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
Power Supply for LCD Drive
V1 V2 V3 V4 V5 5 Busy Flag
Parallel/Serial Data Conversion Circuit 5 Character Generator RAM (CGRAM) 512 bits 8 8 7 8 Instruction 8 Register (IR) 7 Address Counter (AC) 7 7 16-bit 16 Common 16 Shift Driver Common Register C1-C16 CLK1 CLK2 M Instruction Decoder (ID) Display 7 Data RAM (DDRAM) 7 80x8 bits Cursor & Blink Controller Circuit
Character Generator ROM (CGROM) 8320 bits 8
DB4-DB7 4 8 DB0-DB3 4 Input/ Output Buffer
Data Register (DR)
R/W RS E
60-bit 60 60-bit 60 SegShift Latch ment Register Circuit Driver
60 S1-S60
D
OSC1 OSC2
Timing Generator Circuit VDD GND
Figure 1. S6A2068 Block Diagram
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16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
PIN CONFIGURATION
S46 S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
S47 S48 S49 S50 S51 S52 S53 S54 S55 S56 S57 S58 S59 S60 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1
S6A2068
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 VDD E R/W RS D M CLK2 CLK1 V5 V4 V3 V2
S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 VSS OSC2 OSC1 V1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Figure 2. S6A2068 Pin Configuration
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S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DIAGRAM
80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
X
Y
(0, 0)
Chip size: 3700 x 5050 Pad size: 100 x 100 Unit: m
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30
* S6A2068 Marking: easy to find the PAD No. 77, 82
4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
S6A2068
Figure 3. S6A2068 Pad Diagram
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
PAD LOCATION
[Unit: m]
PAD NUM. PAD NAME X Y
Table 1. S6A2068 Pad Location
COORDINATE PAD NUM. PAD NAME COORDINATE X Y PAD NUM. PAD NAME COORDINATE X Y
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
NOTE:
S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 VSS OSC2 OSC1 V1 V2 V3 V4 V5
-1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1684 -1078 -953 -828 -703 -578
1686 1560 1436 1310 1186 1060 936 810 686 560 436 310 186 60 -64 -190 -314 -440 -564 -690 -814 -940 -1064 -1190 -1314 -1440 -1702 -1868 -1994 -2358 -2358 -2358 -2358 -2358
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
CLK1 CLK2 M D RS R/W E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 S60 S59
-453 -328 -203 -78 47 172 297 422 547 672 797 922 1047 1172 1297 1422 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684
-2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -2358 -1814 -1690 -1564 -1440 -1314 -1190 -1064 -940 -814 -690 -564 -440 -314 -190 -64 60 186 310
69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
S58 S57 S56 S55 S54 S53 S52 S51 S50 S49 S48 S47 S46 S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27
1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1684 1249 1124 999 874 749 624 499 374 249 124 -1 -126 -251 -376 -501 -626 -751 -876 -1001 -1126 -1251
436 560 686 810 936 1060 1186 1310 1436 1560 1686 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358 2358
"S6A2068" Marking: easy to find the PAD No. 77, 82.
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S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN DESCRIPTION
Table 2. S6A2068 Pin Description PIN (No). VDD(42) VSS(GND) (27) V1-V5(30-34) S1-S60 (1-26, 67-100) C1-C16 (51-66) OSC1, OSC2 (29) (28) Output Output Input (OSC1) Output (OSC2) Output Segment output Common output Oscillator I/O Power Name Power supply Description for logical circuit (2.7V to 5.5V) 0V (GND) Bias voltage level for LCD driving Segment signal output for LCD driving Common signal output for LCD driving Both pin connected to Rf resistor for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Clock output terminal for the serially transferred data to be latched to the driver. Clock output terminal used when D terminal data output shifts the inside of the driver. The alternating signal to convert LCD drive waveform to AC. Character pattern data, which is corresponding to each common signal, is supplied to driver serially. Start enable signal to read or write the data R/W signal input is used to select the read/write mode register selection input Used for data transfer between the MPU and S6A2068. These terminals are for data bus with bi-directional three-state. First 4-bit (DB0-DB3) are not used during 4-bit operation (DB7 can be used as a busy flag). MPU LCD LCD Resistor Interface Power Supply
CLK1 (35) CLK2 (36) M (37)
Data latch clock Data shift clock Alternated signal for LCD driver output Display data interface
S6A0065 or S6A2067
D (38)
E (41) R/W (40) RS (39) DB0-DB7 (43-50)
Input
Read/Write Enable Read/Write Register select
Input/ Output
Data interface
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16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
Internal logic of input/output terminal Input/Output Input No Pull up Logic Diagram
VDD
Applicable pin E
with pull up
VDD VDD
RS, R/W
Output
VDD
CLK1, CLK2 M, D
Input/Output
VDD
VDD
DB0-DB7
VDD
Enable
Data
7
S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT
(TA = 25C) Characteristic Operating Voltage Driver Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature
NOTE:
Symbol VDD VLCD VIN PD TOPR TSTG
Value -0.3 to +7.0 VDD - 11.5 to VDD + 0.3 -0.3 to VDD + 0.3 500 -30 to +85 -55 to + 125
Unit V V V MW C C
Voltage greater than above may damage the circuit (VDD V1 V2 V3 V4 V5)
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16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
ELECTRICAL CHARACTERISTICS
DC Characteristics (V DD = 4.5V to 5.5V, VSS = 0V, TA = -30 to +85C)
Characteristic Symbol VDD Test condition - Min 4.5 - Typ - 0.65 Max 5.5 0.9 Unit V mA Applicable Pin
Operating Voltage Operating Current (*1)
IDD1 IDD2
Ceramic resonator fOSC = 250kHz
Resistor oscillation external clock operation fOSC = 270kHz - - - - IOH = -0.205mA IOL = 1.2mA IO = -40A IO = 40A IO = 0.1mA
-
0.45
0.7
Input Voltage 1
High Low
VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG ILKG IIN
2.2 -0.3 VDD-1.0 -0.2 2.4 - 0.9VDD - - -
- - - - - - - - - - - -125 250 50 - - 270
VDD 0.6 VDD 1.0 - 0.4 - 0.1VDD 1 1 1 -250 350 55 0.2 0.2 360
V
E, DB0DB7, R/W, RS OSC1
Input Voltage 2
High Low
Output Voltage 1
High Low
DB0-DB7
Output Voltage 2
High Low
CLK1, LK2, M, D
Voltage Drop (*2)
COM SEG
C1-C16 S1-S60 A E RS, R/W kHz % s s kHz OSC1, OSC2 V1-V5 OSC1
Input Leakage Current Input Low Current External Clock Frequency (*3) Duty Rise time Fall time Internal Clock Frequency (*3) LCD Driving Voltage (*4)
VIN = 0 V or VDD VDD = 5V(test pull up R) -
-1 -50 125 45 - -
fEC duty tR tF fOSC1
Rf = 91k VDD = 5V
2%
190
VLCD1 VLCD2
VDD-V5
1/5 bias
1/4 bias
4.6 3.0
- -
10.0 10.0
V
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S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
DC Characteristics (V DD = 2.7V to 4.5V, VSS = 0V, TA = -30 to +85C)
Characteristic Operating Voltage Operating Current (*1) Symbol VDD IDD1 IDD2 Test condition - Ceramic resonator fOSC = 250kHz Resistor oscillation external clock operation fOSC = 270kHz - - - - IOH = -0.205mA IOL = 1.2mA IO = -40A IO = 40A IO = 0.1mA Min 2.7 - Typ 3.0 0.3 Max 4.5 0.5 Unit V mA Applicable Pin
-
0.17
0.3
Input Voltage 1
High Low
VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 VdCOM VdSEG ILKG IIN
1.9 -0.3 0.7VDD - 2.0 - 0.8VDD - - -
- - - - - - - - - - - -50
VDD 0.4 VDD 0.2VDD - 0.4 - 0.2VDD 1 1.5 1 -120
V
E, DB0DB7, R/W, RS OSC1
Input Voltage 2
High Low
Output Voltage 1
High Low
DB0-DB7
Output Voltage 2
High Low
CLK1, CLK2, M, D C1-C16 S1-S60 A E RS, R/W
Voltage Drop (*2)
COM SEG
Input Leakage Current Input Low Current
VIN = 0 V or VDD VDD = 5V (test pull up R) -
-1 -10
External Clock
Freq. (*3) Duty Rise time Fall time
fEC duty tR tF fOSC1
125 45 - -
250 50 - - 270
350 55 0.2 0.2 350
kHz % s s kHz
OSC1
Internal Clock Frequency (*3) LCD Driving Voltage
Rf = 75k VDD = 3V
2%
190
OSC1, OSC2 V1-V5
VLCD1 VLCD2
VDD-V5 1/5 bias 1/4 bias
3.0 3.0
- -
10.0 10.0
V
10
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
NOTES: *1) The supply current value from VDD when condition is as follows VDD = 5V, VSS = 0V, V5 = -2V VDD = 3V, VSS = 0V, V5 = -2V *2) Applied to the voltage drop occurring from terminals VDD, V1, V4 and V5 to each common terminal (C1-C16) when 0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occurring from terminals VDD, V2, V3 and V5 to each SEG terminal (S1-S60). When the output level is at VDD, V1 or V2 level, 0.1mA is flown out, while 0.1mA flow in when the output level is at V3, V4 or V5 level. This occurs when 5 V or -5 V is input to VDD, V1 and V3 or to V2, V4, and V5 respectively. *3) and *4): Refer to oscillator circuit and input the voltage listed in the table bellow to V1-V5 *3) Oscillator circuit
Resistor Circuit
External Circuit
OSC1
OSC2 OSC1 OSC2
Rf Rf: 91k +2%
open Frequency input
*4) Input the voltage listed in the table below to V1-V5
Duty 1/8, 1/11 Power supply V1 V2 V3 V4 V5
NOTE:
Duty 1/16 Bias 1/5 VDD - VLCD/5 VDD - 2V LCD/5 VDD - 3V LCD/5 VDD - 4V LCD/5 VDD - VLCD
Bias 1/4 VDD - VLCD/4 VDD - VLCD/2 VDD - VLCD/2 VDD - 3V LCD/4 VDD - VLCD
VLCD is the LCD driving voltage, refer to the initial set of the instruction code.
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S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics (1) Write Mode (Writing data from MICOM to S6A2068) ( VDD = 4.5V to 5.5V, TA = -30 to +85C) Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width (High, Low) R/W and RS Set-Up Time R/W and RS Hold Time Data Set-Up Time Data Hold Time Symbol tC tR tF tW tSU1 tH1 tSU2 tH2 Min 500 - - 220 40 10 60 10 Typ - - - - - - - - Max - 25 25 - - - - - Unit ns ns ns ns ns ns ns ns Test pin E E E E R/W, RS R/W, RS DB0 - DB7 DB0 - DB7
( VDD = 2.7V to 4.5V, TA = -30 to +85C) Characteristic E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) R/W and RS Set-Up Time R/W and RS Hold Time Data Set-Up Time Data Hold Time Symbol tC tR tW tSU1 tH1 tSU2 tH2 Min 1400 - 400 60 20 140 10 Typ - - - - - - - Max - 25 - - - - - Unit ns ns ns ns ns ns ns Test pin E E E R/W, RS R/W, RS DB0 - DB7 DB0 - DB7
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16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
RS
VIH1 VIL1 tsu1 VIL1 tw
VIH1 VIL1 th1 VIL1 th1 tf VIH1 VIL1 tsu2 Valid Data tc
R/W
E tr DB0 - DB7
VIH1 VIL1 VIH1 VIL1
th2 VIH1 VIL1
VIL1
13
S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(2) Read Mode (Reading data from S6A2068 to MCU) (V DD = 4.5V to 5.5V, TA = -30 to +85C) Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width (High, Low) R/W and RS Set-Up Time R/W and RS Hold Time Data Output Delay Time Data Hold Time Symbol tC tR tF tW tSU tH tD tDH Min 500 - - 220 40 10 - 20 Typ - - - - - - - - Max - 25 25 - - - 120 - Unit ns ns ns ns ns ns ns ns Test pin E E E E R/W, RS R/W, RS DB0 to DB7 DB0 to DB7
(V DD = 2.7V to 4.5V, TA = -30 to +85C) Characteristic E Cycle Time E Rise / Fall Time E Pulse Width (High, Low) R/W and RS Set-Up Time R/W and RS Hold Time Data Output Delay Time Data Hold Time Symbol tC tR tW tSU tH tD tDH Min 1400 - 400 60 20 - 5 Typ - - - - - - - Max - 25 - - - 360 - Unit ns ns ns ns ns ns ns Test pin E E E R/W, RS R/W, RS DB0 - DB7 DB0 - DB7
14
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
RS
VIH1 VIL1 tsu
VIH1 VIL1 th VIL1 tf
R/W tw VIH1 VIL1 tD VIH1 VIL1 th
E tr DB0 DB7
VIL1 tD Valid Data tc VOH1 VOL1
VIL1
15
S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
(3) Interface Mode (with S6A0065, S6A2067) (V DD = 2.7V to 5.5V, TA = -30 to +85C) Characteristic Clock Pulse Width High Clock Pulse Width Low Data Set-Up Time Data Hold Time Clock Set-Up Time M Delay Time Symbol tWCKH tWCKL tSU tDH tCSU tDM Min 800 800 300 300 500 -1000 Typ - - - - - - Max - - - - - 1000 Unit ns ns ns ns ns ns Test pin CLK CLK D D CLK M
CLK1
0.9VDD tWCKH tCSU
0.9VDD tWCKH
CLK2
0.1VDD
0.9VDD tCSU
0.9VDD 0.1VDD tWCKL 0.9VDD 0.1VDD tSU tDH 0.1VDD
D
M
0.9VDD tDM
16
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
CONTROL AND DISPLAY COMMAND Command
Clear Display Return Home Entry Mode Set
RS
0 0 0
R/W
DB7
DB6
DB5
DB4
DB3
DB4
DB1
DB0
Execution Time (f OSC=250kHz) 1.64ms 1.64ms 40s
Remark
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 1
0 1 I/D
1 X SH
cursor move to first digit * I/D; set cursor move direction H: Increase L: Decrease * SH: Specifies shift of display H: Display is shifted L: Display is not shifted
Display On/Off
0
0
0
0
0
0
1
D
C
B
40s
* Display: D H: Display ON L: Display OFF * Cursor: C H: Cursor ON L: Cursor OFF * Blinking: B H: Blinking ON L: Blinking OFF
Shift
0
0
0
0
0
1
S/C
R/L
X
X
40s
* SC H: Display shift L: Cursor move * R/L H: Right shift L: Left shift
Set Function
0
0
0
0
1
DL
N
F
X
X
40s
* DL H: 8-bit interface L: 4-bit interface *N H: 2 line display L: 1 line display *F H: 5 x 10 dots L: 5 x 7 dots
.
17
S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CONTROL AND DISPLAY COMMAND (CONTINUED) Command
Set CG RAM Address Set DD RAM Address Read Busy Flag & Address
RS
0
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Execution Time (f OSC=250kHz) 40s
Remark
CG RAM Data is sent and received after this setting DD RAM Data is sent and received after this setting BF H: Busy L: Ready - Reads BF indication internal operating is being performed. - Reads address counter contents
0
0
1
CG RAM address (corresponds to cursor address)
0
0
1
DD RAM address
40s
0
1
BF
Address Counter used for Both DD & CD RAM address
0s
Write Data Read Data
1 1
0 1
Write Data Read Data
46s 46s
Write data into DD or CGRAM Read data from DD or CGRAM
NOTES: 1. When a MPU program with Busy Flag (DB7) checking is made, 1/2 fOSC (is necessary) for executing 2. the next instruction by the "E" signal after the Busy Flag (DB7) goes to "Low". "x" is don't care.
18
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
APPLICATION INFORMATION ACCORDING TO LCD PANEL
1) LCD Panel: 12 character x 1-line, Character Format; 5 x 7 dots + 1-cursor line (1/4 bias, 1/8 duty)
C1
C8
S1
S6A2068
S60
2) LCD Panel: 12 character x 1-line, Character Format; 5 x 10 dots + 1-cursor line (1/4 bias, 1/11 duty)
C1
C11
S6A2068
S1
S60
19
S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
3) LCD Panel : 12 character x 2-line Character Format; 5 x 7 dots + 1-cursor line (1/5 bias, 1/16 duty)
C1
C8
C9
S6A2068
C16 S1
S60
4) LCD Panel: 24 characterx 1-line, Character Format; 5x 7 dots + 1 dot + 1-cursor line (1/5 bias, 1/16 duty)
C1
C8
S6A2068
S1
S60 C9
C16
20
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A2068
5) LCD Panel: 6 character x 2-line Character Format; 5 x 7 dots + 1-cursor line (1/4 bias, 1/8 duty)
S1
S30
C1
C8
S6A2068
S31
S60
BIAS VOLTAGE DIVIDE CIRCUIT
S6A2068 VDD VDD R R R R V1 V2 V3 V4 V5 VDD VDD R
S6A2068 V1 V2 V3 V4 R R R V5 R
GND or other voltage
GND or other voltage
(1/4 bias, 1/8 or 1/11 duty)
(1/5 bias, 1/16 duty)
21
S6A2068
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
APPLICATION CIRCUIT
DB0-DB7
C1 - C16 S1 - S60
DL2 SC1 - SC40
OSC2
OSC1
VDD CLK2 CLK1 M VSS
V5
V4
V3
V2
to MPU
V1
VEE V1 V2 V3 V4 V5 V6 VDD VSS M SHL2 CL2 SHL1 CL1 FCS DR2 DL1 DR1
VEE V1 V2 V3 V4 V5 V6 VDD VSS M SHL2 CL2 SHL1 CL1 FCS DR2 DL1 DR1
D
VEE V1 V2 V3 V4 V5 V6 VDD VSS M SHL2 CL2 SHL1 CL1 FCS DR2 DL1 DR1
GND or Other voltage V5 V4 V3 V2 V1
VLCD (1/5 bias) When S6A0065 is externally connected to the S6A2068, you can increase the number of display digits up to 80 characters.
22
DL2
SC1 - SC40
DL2
SC1 - SC40
LCD Panel

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